One type of a conventional amplifying circuit for driving a low impedance load is described in a report titled "MOS Operational Amplifier Design--A Tutorial Overview" of "IEEE Journal of Solid-State Circuit, Vol. SC-17, No.6, December 1982". The conventional amplifying circuit comprises two differential amplifiers each amplifying a difference between one input signal and a signal fed-back from an output terminal, and two output stage transistors having sources connected to a power supply and ground, respectively, to be driven by the differential amplifiers.
The conventional amplifying circuit has an advantage in that a range of an output voltage can be wide as compared to an amplifying circuit using a source follower circuit at an output stage.
However, the conventional amplifying circuit has a disadvantage in that an idling current flowing through the output stage transistors is largely fluctuated, when the two differential amplifiers are supplied with an input offset voltage.
For the purpose of overcoming this disadvantage, the other type of a conventional amplifying circuit is proposed as described in a report titled "A 1.544 Mb/s CMOS Line Driver for 22.8 Ohm Load" of "IEEE Journal of Solid-State Circuits, Vol. SC-25, No.3, June, 1990". In this conventional amplifying circuit, an idling current flowing through output stage transistors is controlled to be increased or decreased by two negative feed-back amplifiers which are connected to outputs of two differential amplifiers, respectively.
However, this conventional amplifying circuit has disadvantages in that it is difficult to control the idling current with a predetermined precision, because the idling current is determined at the time of no load by amplification factors of the differential and negative feedback amplifiers and an input offset voltage of the differential amplifier, and in that the design is difficult on some points as described later.